Fixing some naive assumptions, making shell for parsing an instruction from memory.
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6c453709a5
commit
021828d494
4 changed files with 67 additions and 6 deletions
54
src/cpu.zig
54
src/cpu.zig
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@ -15,8 +15,8 @@
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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const std = @import("std");
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const std = @import("std");
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const mem = @import("memory.zig");
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const instructions = @import("instructions.zig");
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const memory = @import("memory.zig");
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pub const Register = enum {
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pub const Register = enum {
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EAX,
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EAX,
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EBX,
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EBX,
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@ -52,4 +52,54 @@ pub const Cpu = struct {
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.initFill(0x00000000),
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.initFill(0x00000000),
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};
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};
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}
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}
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pub fn executeInstruction(
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self: *Cpu,
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mem: *memory.Memory,
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instruction: instructions.Instruction,
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) !void {
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_ = mem;
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_ = self;
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switch (instruction.opcode) {
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instructions.Opcode.MovRegToRegMem_8 => {},
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}
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}
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fn makeInstruction(
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self: *Cpu,
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mem: *memory.Memory,
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) instructions.Instruction {
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const modrm: ?u8 = null;
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const sib: ?u8 = null;
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const displacement: ?u8 = null;
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const immediate: ?u8 = null;
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const prefix = self.parsePrefix(&mem);
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const opcode = mem.readByte(self.instruction_pointer);
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self.instruction_pointer += 1;
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if (instructions.opcodeRequiresModRM(opcode)) {
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modrm = mem.readByte(self.instruction_pointer);
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self.instruction_pointer += 1;
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//TODO: SIB
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//TODO: Displacement
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}
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if (instructions.opcodeRequiresImmediate(opcode)) {
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//TODO: Handle immediates
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}
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return instructions.Instruction{
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.prefix = prefix,
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.opcode = opcode,
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.modrm = modrm,
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.sib = sib,
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.displacement = displacement,
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.immediate = immediate,
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};
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}
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fn parsePrefix(
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self: *Cpu,
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mem: *memory.Memory,
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) instructions.Prefix {
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_ = self;
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_ = mem;
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}
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};
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};
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@ -33,7 +33,7 @@ pub const Prefix = struct {
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pub const Instruction = struct {
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pub const Instruction = struct {
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prefix: Prefix,
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prefix: Prefix,
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opcode: u8,
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opcode: Opcode,
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///The MOD-REG-R/M byte specifies instruction operands and their addressing mode.
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///The MOD-REG-R/M byte specifies instruction operands and their addressing mode.
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modrm: ?u8 = null,
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modrm: ?u8 = null,
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///Scaled indexed addressing mode uses the second byte (namely, SIB byte)
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///Scaled indexed addressing mode uses the second byte (namely, SIB byte)
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@ -43,7 +43,7 @@ pub const Instruction = struct {
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immediate: ?u8 = null,
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immediate: ?u8 = null,
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};
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};
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pub const Opcode = enum {
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pub const Opcode = enum(u8) {
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//
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//
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MovRegToRegMem_8 = 0x88,
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MovRegToRegMem_8 = 0x88,
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MovRegToRegMem_16_32 = 0x89,
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MovRegToRegMem_16_32 = 0x89,
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@ -59,3 +59,13 @@ pub const Opcode = enum {
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//
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//
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MultiByte = 0xFF,
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MultiByte = 0xFF,
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};
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};
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pub fn opcodeRequiresModRM(opcode: Opcode) bool {
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_ = opcode;
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return false;
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}
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pub fn opcodeRequiresImmediate(opcode: Opcode) bool {
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_ = opcode;
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return false;
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}
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@ -42,6 +42,7 @@ const SEGMENT_REGISTER_USAGE = SEGMENT_REGISTER_COMMAND;
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const HELP_USAGE = HELP_COMMAND;
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const HELP_USAGE = HELP_COMMAND;
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const CLEAR_USAGE = CLEAR_COMMAND;
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const CLEAR_USAGE = CLEAR_COMMAND;
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const EXIT_USAGE = EXIT_COMMAND;
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const EXIT_USAGE = EXIT_COMMAND;
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pub fn main() !void {
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pub fn main() !void {
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var memory = mem.Memory.init();
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var memory = mem.Memory.init();
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var cpu = cpu_.Cpu.init();
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var cpu = cpu_.Cpu.init();
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@ -25,11 +25,11 @@ pub const Memory = struct {
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};
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};
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}
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}
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pub fn readByte(self: *Memory, addr: u8) !u8 {
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pub fn readByte(self: *Memory, addr: u32) !u8 {
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return self.data[addr];
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return self.data[addr];
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}
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}
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pub fn writeByte(self: *Memory, addr: u8, value: u8) !void {
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pub fn writeByte(self: *Memory, addr: u32, value: u8) !void {
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self.data[addr] = value;
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self.data[addr] = value;
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}
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}
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};
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};
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